This invention relates to integrated circuits, and more particularly, to circuitry on integrated circuits that allows one of several voltage-controlled oscillators to be selectively switched into use in a circuit such as a phase-locked loop.
Digital integrated circuits often contain analog circuitry. For example, some digital integrated circuits contain analog phase-locked loop circuitry. The analog phase-locked loop circuitry may be used as part of a clock and data recovery circuit or other circuit.
In certain types of circuits, such as programmable logic circuits, a logic designer may have the option of using the phase-locked loop circuitry for a variety of potential applications. For example, depending on the needs of the designer, the phase-locked loop circuitry may be used as part of a synchronous optical networking (SONET) transceiver or may be used as part of a Gigabit Ethernet transceiver. These circuits may have different operating requirements. For example, a SONET circuit may require very low phase noise, whereas this may not be a requirement of a Gigabit Ethernet, or other less stringent application-based circuit. Another example is where the VCOs may be called upon to provide different free-running frequencies.
Phase-locked loop circuits may contain voltage-controlled oscillators. There is generally a tradeoff between power consumption and phase noise in a voltage-controlled oscillator. Note that the power consumption associated with the VCO (voltage-controlled oscillator) in the context of a PLL (phase-locked loop) is generally a fixed quantity. As such, designing a PLL with stringent, low phase noise that consumes considerable power is then wasteful for applications where this phase noise stringency is not needed. Conversely, if the VCO is designed as a low-power device, it may not meet the phase noise demanded of it in more stringent applications. An example now follows.
When a transceiver such as a SONET transceiver requires a low phase noise, it may be necessary to use a design for a phase-locked loop and voltage-controlled oscillator for that transceiver that consumes a relatively large amount of power. When a transceiver such as a Gigabit Ethernet transceiver does not require the same low phase noise, however, power can be conserved by using a design for a phase-locked loop and voltage-controlled oscillator that consumes less power.
In order to minimize power consumption while meeting required performance levels, conventional integrated circuits sometimes use arrangements with multiple phase-locked loops, each with a corresponding optimized voltage-controlled oscillator. This type of arrangement may make it possible to operate the integrated circuit with an appropriately tailored phase-locked loop circuit, but leads to duplication and therefore consumes large amounts of circuit area.
It would therefore be desirable to provide improved ways in which to implement oscillator circuitry on an integrated circuit.